资源列表
jianfa_sub
- 基于FPGA的减法器的verilog程序源代码-FPGA-based subtractor verilog source code
dianji
- 基于FPGA的步进电机控制的verilog程序源代码-FPGA-based stepper motor control verilog source code
counter10
- verilog编写的10进制计数器，并且功能仿真正确。软件为quartus II 11.0,和Modelsim-verilog prepared 10 binary counter, and functional simulation is correct. Software quartus II 11.0, and Modelsim
EP3C_FFT
- 在EP3C16 fpga 开发板上上实现了对输入声音进行FFT计算，并实时的显示在VGA显示器上。-The DE2 board to achieve a sound input FFT calculation, and real-time display on the VGA monitor.
CD1_MT9M111_DISPALY
- 使用Altera fpga cyclone III系列EP3C16对摄像头MT9D001的驱动，并可以在VGA显示器上实时显示。使用quartus 10.0打开，注意不要使用中文路径。-Using Altera fpga cyclone III series EP3C16 MT9D001 the camera driver, and can be displayed in real time on a VGA monitor. Using quartus 10.0 open, be carefu
CD1_PHOTO_ABLUM(1280)
- 在EP3C16 fpga上实现了数码相册，可以从SD卡上读取jpeg图片，并进行解码，最后在VGA显示器上显示1280*1024的图片。-In EP3C16 fpga to achieve a digital photo album that can be read from the SD card jpeg picture and decoding, and finally displayed on a VGA monitor 1280* 1024 picture.
USB_FT245
- 在altera fpga cycloneIII EP3C5E 上实现了对USB 245的通信。-In altera fpga cycloneIII EP3C5E on the realization of the USB 245 communications.
EXP42_RS232_PIANO
- 在EP3C5E上进行试验，PC机检测到PS2键盘，将键盘的数值通过串口传输给fpga，fpga驱动蜂鸣器发出音乐。-Tested on the EP3C5E, PC machine detects the PS2 keyboard, the keyboard' s numeric via the serial transmission to the fpga, fpga drive buzzer music.
voter
- 这是一个基于Quartus2 的七人投票表决系统-voter for 7 men
count4
- 这是一个基于Quartus2 开发环境的4输入加法器- 4adder basic on Quartus2
Multivibrator_circuit
- 这是某工业大学的课程设计多谐振荡电路，经过修订完全通过了的-Multivibrator circuit, Guangdong University of curriculum design
decoder_38
- 这是基于Quartus2 开发环境和verilog hdl语言写的38译码器-This is based development environment and Quartus2 verilog hdl language used to write decoder 38