资源列表
rio_latest.tar
- rapidIO 的VHDL代码，包括协议和交换代码，非常棒，值得学习-rapidIO VHDL code, including protocols and exchange code, great, worth learning
vhdl.tar
- 38译码器的VHDL实现，支持linux平台，包含完整的Makefile支持。-38 decoder VHDL, support linux platform, including full Makefile support.
FPGADAC
- 这是一个FPGA控制DAC的程序 这是一个FPGA控制DAC的程序 -Send a VHDL file Send a VHDL file Send a VHDL file Send a VHDL file Send a VHDL file
taxi20
- 一个计程车根据距离计费显示在数码管上的小代码，在DE2-115开发板上实现。-According to a taxi from the billing code on the digital display of small tubes in the DE2-115 board implementation.
YINYUE-BOFANGQUI
- 用verilog 语言实现音乐播放器，按键可以实现歌曲的暂停和快进功能，希望有帮助-Use verilog language implementation music player, buttons can achieve the function of songs pause and fast forward, hope to have help
src
- 实现VERILOG音乐播放器功能，但是不能快进，能显示其歌词。 希望有帮助-Realize the VERILOG music player functions, but can t fast forward, to show its lyrics. Hope to have help
JIAOTONGDENG
- 用VERILOG实现 交通灯控制，且运行正确，希望有帮助-Use VERILOG implementation traffic light control, and operation right, hope to have help
zidong-shouhuoji
- 用VERILOG实现自动售货机功能，运行正确，希望有帮助-Use VERILOG implementation vending machine function, correct operation, hope to have help
state_verilog
- 用VERILOG实现状态机，对状态机的理解很有帮助-Use VERILOG implementation state machine, the understanding of the state machine is very helpful
adder
- 硬件实现的高速并行加法器，包括仿真使用的代码和case-high speed adder and test case
i2c_interface_v1
- 通过对IC2总线时序的分布，实现对IC2总线上的数据的接收和发射-IC2 through the distribution bus timing to achieve reception of data on the bus and IC2 emission
lcd12864_test
- 基础实验08-12864中文字符显示实验，FPGA源代码-Experimental basis 08-12864 Chinese character display experiments, FPGA source code