资源列表
memio
- 最新VHDL 模块，实现对SRAM的控制，能直接用在ALTEAR XILLIX 等 FPGA上，
Example-b8-4
- 每个工程示例都包括了该工程的项目文件、源文件、报告文件和生成结果等文件，读者可以用Quartus II或相应的软件直接打开。设计源文件根据设计输入类型分为源代码或原理图等。-Each project examples include the project files of the project, source files, report files and generate the results files, the reader can use Quartus II or the sof
KEY-LED
- 基于C8051F020的键盘控制LED程序-C8051F020-based keyboard LED program control
TLB
- 用verilog语言实现了快速线性列表的查找，程序实现了一个基本框架，下载下来可以添加新内容-Using verilog language to achieve a fast linear list to find the program implements a basic framework, you can add new content downloaded
khatd
- It comprises aircraft flight attitude control, such as slip angle, tilt angle, roll angle, pitch angle, Including AHP, factor analysis, regression analysis, cluster analysis, Face Recognition light treatment method.
tft-7-LCD-DRIVE-VERILOG
- 基于FPGA 液晶屏驱动，使用verilog编写-Fpga based on the tft LCD driver, is written in verilog
Chapter-4
- Verilog数字系统设计教程(第2版)”这本书的思考题没有答案，要多做实验和仿真-• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are
AdcFrame
- -- Device: Virtex-5 -- Author: Marc Defossez -- Entity Name: AdcFrm -- Purpose: This file is part of an FPGA interface for a Texas Instruments ADC. -- Tools: ISE + XST -- Limitations: none--- Device: Virtex-5 -- Author: Marc Defossez --
LATTICE_synplifyPro_basic_flow
- LATTICE 同步（ synplifyPro）basic_flow 源码-LATTICE synchronization (synplifyPro) basic_flow source
asfpga_v1.00e.tar
- asfpga is an assembler written for use in FPGA design. It can be easily modified for your instruction set. The ultimate goal of this software is to allow a FPGA designer to easily write assembly code for a custom instruction set.
qpsk_simulink
- Matlab simulink qpsk
sdram_module3
- 能够实现16位的SDRAM的读写，没有仿真文件，只有SDRAM读写的源代码，用Verilog编写-can complete read or write sdram， only include Verilog code and no simulation files