资源列表
VHDL-Introduction
- VHDL Tutorial introduction pdf
experiment9
- 实现VGA图像显示功能，最后图形是皮卡丘。-Achieve VGA image display function, the last graphic is Pikachu.
Counter
- 该程序是一个verilog语言程序，用于计数-The program is a verilog language program, used to count
1
- 进阶实验_01_秒表：数字秒表，按键+数码管-Advanced experimental _01_ stopwatch: digital stopwatch, digital keys+
WITH_LED_RUN
- 上位机通过PCI9054和fpga通讯，例子中为主机发送包，传到pci9054,然后pci9054把数据发给fpga，fpga收到数据控制LED-PC communication through the PCI9054 and fpga examples for the host to send packets transmitted pci9054, then send the data pci9054 fpga, fpga receive data control LED
2
- 进阶实验_02_抢答器 ：抢答器，4路-Advanced experimental _02_ Responder: Responder, 4
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- 进阶实验_03_UART ：串口，波特率115200，与PC通信-Advanced experimental _03_UART: serial, 115200 baud rate, communication with the PC
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- 进阶实验_04_LCD1602显示 ：在LCD1602上显示RedCore网址-Advanced experiments _04_LCD1602: Display RedCore site on LCD1602
FPGA_Project_Files
- 此例为FPGA发送数据包到pci9054，用到fifo模块，还有sram模块，比较复杂。应用在pci9054与fpga通讯-This example sends the packet to the FPGA pci9054, use fifo module, as well as sram module, is more complex. Application pci9054 communication with fpga
5
- 进阶实验_06_VGA ：通过VGA显示一个汉字，800X600@72Hz-Advanced experiments _06_VGA: Show a character through VGA, 800X600 @ 72Hz
VGA_SW_Verilog
- VGA IP硬核设计，通过开关简单控制输出图像，在ISE14.6验证通过。-VGA IP hard-core design, the output image by a simple control switch, ISE14.6 validation.
Xgpio_Leds_Verilog
- 利用Xgpio实现外设数据交互，本例利用Xgpio控制开关和灯。-Peripheral use Xgpio achieve data exchange, in this case the use of Xgpio control switches and lights.