资源列表
RANS-SCHEM
- RANS SCHEM IMPLEMENTD VHDL
bot
- GPSDO VHDL CODE SCHEMATIC
ol_no_corr
- OL NO CORRECTION VHDL SOURCE CODE
SA_VHDL-
- a simple serial adder in vhdl, enjoy it
conv_encoder
- TD-LTE中（3.1.7）咬尾卷积码编码器verilog代码-Tail-biting convolutional code encoder verilog code
scr
- 12864显示字符和汉字 ，驱动12864,包括初始化/地址和数据的写 -12864 display characters and Chinese characters, the driver 12864, including the initialization/address and write data
ARM_37numbers_32bits
- ARM架构下的32位37个寄存器组的verilog源码-ARM architecture 32 37 register banks verilog source
ARM_shift_32bits
- ARM架构下的32位桶形移位器的verilog源码-32-bit barrel shifter verilog ARM architecture of the source
MIPS_shift_8bits
- ARM架构下的8位桶形移位器的verilog源码-8 barrel shifter ARM architecture of verilog source
MIPS_shift_32bits
- MIPS架构下的32位桶形移位器的verilog源码-32-bit barrel shifter verilog MIPS architecture of the source
LED
- 基于fpga控制的led跑马灯，芯片为ep2c5t144c8，简单利用新手开发调试-Based on fpga control led marquees, chip ep2c5t144c8
LCD1602
- 基于fpga的lcd1602显示，实测。望采纳-Fpga based lcd1602 show measured. Hope Adoption