资源列表
adder4
- This example illustrates the use of the For Generate statement to construct a ripple-carry adder a full adder function. It also shows how to use a package -This example illustrates the use of the For Generate statement to construct a ripple-carry add
AD-and-DA-in-DSPPFPGA
- 上海志宇DSP+FPGA开发板AD/DA回放程序-AD/DA in DSP+FPGA
FLASH_test
- 基于上海志宇DSP+FPGA开发板的FLASH程序开发-FLSAH verilog
DataPathComponent.vhd
- Solo componentes para un single Datapath
PC.vhd
- El PC de un datapath
practic1.vhd
- Una pequeñ a practica para iniciar en VHDL
CPLD
- epm 570 cpld 跑马灯程序 希望对大家能有点用-epm 570 cpld Marquee program
vhdl-bjq
- 用vhdl语言编写表决器程序，通过代码实现来实现，采用三种实现方式。-Voting procedures used to write vhdl language code
ADC
- ADC IMPLEMENTATION IN FPGA
songer2
- 电子琴演奏电路，内置3首音乐,可以选择单曲循环和顺序播放，也可切换到手动弹奏-Playing keyboard circuit, built three music, you can single cycle and the order of play, but also can switch to manual play
Verilog-code-for-finding-GCD
- State machine implemented in verilog to find GCD of two 8 bit numbers. Two files are included (module and its testbench)
usb_host-usb-fpga
- 基于FPGA的Verilog语言设计的USB程序，适合初学者-Verilog language based on the FPGA design of USB application, suitable for beginners