资源列表
i2c
- I2C interface in VHDL
nios_16QAM_modu
- 在alter公司的fpga上实现了一个最小niosII软核系统，可以作为简单开发的基础工程-A minimum of niosII soft core system is implemented in alter s FPGA, can be used as the basis of simple project development
bdpsk
- 基于CPLD的bpsk的调制系统，可以作为简单的实现模型-CPLD modulation system based on BPSK, can be used as a simple implementation model
Antenova-(Legacy)
- Altium DEsigner Antenova libraries
Timer_New
- 数字时钟，24小时显示功能 但是清零有问题-Timer for vhdl
led_24_terminal
- 这是一段用VHDL语言写的24进制计数器，用数码管显示，我用了例化语句，分为24进制计数器模块，十位译码，个位译码，用cycloneII ep2系列实验板验证，能计数0~23。此程序还可以修改为100以内任何进制计数器。-This is a written in VHDL language 24 a binary counter, using digital tube display, I used the instantiated statements, divided into 24 hex
IRIGDECODE
- IRIG-b 解码模块 采用VHDL编写，简单实用，已实测验证-IRIG-B DECODE VHDL
mylcd
- Xilinx中lcd显示屏两行显示+启动程序+滚动-Xilinx lcd display
Phase-Locked-Loop
- PLL CODE IN VERILOG DESIGN
11.ppt
- THIS USEFULL FOR VLSI-THIS IS USEFULL FOR VLSI
first
- this is useful vlsi ppt explains
qpsk_PRJ
- 利用FPGA实现qpsk，ISE工程文件及代码-realize the QPSK by FPGA using VHDL