资源列表
2_lamp_control
- 本代码实现多路彩灯控制过程，采用VHDL语言。思想简单，结构清晰。-The code to achieve multiple lights control process, using VHDL language. Thinking of a simple, clear structure.
3_first_event_detector
- 本代码实现智力抢答器的功能，采用VHDL语言。全部实现过程全在文件里面，结构清晰，思想明了。-This code realization of intelligence responder function, using VHDL language. The whole implementation process full in files, clear structure, clear thinking.
music-player
- 实现音乐播放器设计，有音乐播放查表电路模块-finish the design of music player,it has the look-up circuit table module of music playing
ds1820
- 基于FPGA的温度控制系统 VHDL 数码管显示温度 ds1820 温度报警-The temperature control system based on FPGA VHDL digital display temperature ds1820 temperature alarm
NiosII
- 非常不错的nois设计程序代码 通过 可以尝试下载-maybe, helpful for you
ADS8330_Module
- 模数转换芯片ADS8330的Verilog HDL源程序，已在项目中验证了其可行。-Analog to digital conversion chip ADS8330 of Verilog HDL source code, has verified its feasibility in the project.
FPGA-based-image-median-filtering
- 基于FPGA的图像中值滤波，在xilinx的FPGA上实现了算法，采用matlab的算法最终通过了验证。-FPGA-based image median filtering on xilinx FPGA implementation of the algorithm, using matlab algorithm finally passed validation.
arm9_compatiable_code
- arm9 compatiable verilog code
SLAVE-FIFO-16BITS
- EZUSB FX2 的 SLAVE FIFO例程，包含8051的Firmware以及FPGA的FIFO控制代码-EZUSB FX2 the SLAVE FIFO example, including 8051 MCU Firmware and FPGA FIFO control code
electric-clock
- 电子钟，采用数码管显示，实现日历，时钟，校准，定时器功能-Electronic clock, the use of digital tube display, the realization of the calendar, clock, calibration, timer function
CD1_EDGE_DECT
- FPGA的摄像头程序，很不错的代码-FPGA camera program, very good code!!!!!!!!!!!
CD1_MT9V032C_RAW_DISPALY_TRANS
- MT9V032C_的FPGAnios程序，亲测能用-dfgdfg dfgdfg0.