资源列表
DE1_D5M
- 摄像头底层程序,描述怎样在Altera DE0 Board平台上开发摄像功能-Camera underlying process, describe how Altera DE0 Board camera development platform features
nand_interface_con
- NAND FLASH 控制器 功能强大 性能稳定 接口简单 适合使用-NAND FLASH control
pci144_vhdl
- PCI vhdl for Fpga designer to design PCI IP
sram ip verilog
- tsmc 0.18um ip model
led_shizhong
- 8位显示电子时钟,由7段数码管作为显示输出,带有调试调分调秒的按键功能-8-bit display digital clock, as the 7-segment display output, with sub-tone seconds debug button adjustment function
a-adpll-based-on-fpga
- FPGA实现的VHDL语言的全数字锁相环-a adpll based on fpga
s1(1)
- c语言实现信号谱的算法 包含fft的c语言实现-FFT for C
count
- 模可变计数器设计 (1) 设计设置一位控制位M,要求M=0:模23计数;M=1:模109计数。 (2) 计数结果用静态数码管显示,显示BCD码。 (3) 给出此项设计的仿真波形 -Variable counter mold design (1) design set a control bit M, requires M = 0: mode 23 count M = 1: mode 109 count. (2) counts with static digital dis
timer
- VHDL 实现定时器 嵌入式单片机 编程-VHDL Timer embedded microcontroller programming
VHDLSourceCodeFor5ADConvertersads7818
- 一个关于adc的vhdl源码 一个关于adc的vhdl源码
PLCC84_Socket_mdy
- PLCC84 插座的封装,例如cpld芯片EPM7128slc84-PLCC84 socket package, for example, and so on cpld chip EPM7128slc84
cache.tar
- 一个CPU系统中LCACHE的设计,使用LRU算法替换-a LCACHE design in a CPU system, using arithmetic
