资源列表
library
- 介绍VHDL中库的调用，使对库的调用有深入的了解
ram
- EDA应用中RAM具体定义实例，供大家学习和写程序参考之用-EDA applications, examples of the specific definition of RAM, for everyone to learn and write programs for reference
FPGAprogram3
- 波特率发生器的设计，这里是实现上述功能的VHDL源程序，供大家学习和讨论。 -baud rate generator design, here is the realization of the above-mentioned functional VHDL source code for all learning and discussion.
hdlc
- HDLC通信模块发送接收模块VHDL源码
2_10encode
- VHDL语言描述的二进制十进制译码电路，已经编译完成-Binary decimal decoder circuit
fifo.vhd
- This a FIFO in VHDL Code-This is a FIFO in VHDL Code
i2c
- 用VHDL写的I2C控制器，可以读写EEPROM，比较经典。-Written with VHDL I2C controller, you can read and write EEPROM, more classic.
VHDL_to_UART
- 用VHDL编写的串口通讯程序，包括几个不同的程序例子，也可以用verilog进行改写。
project6_source
- VHDL D_Flip-Flops D Flip-Flop P/C layout and results of verification.
time-show
- 年月日时分秒的即时显示1234567890-Real-time display of the month, day, hour
CA-code
- 生成CA码verilog代码，quartusII开放环境，含源代码和仿真文件（波形、testbench）-CA generated code verilog code, quartusII open environment, including source code and simulation files (Waveform, testbench)
serial_multiplier
- Module for Sequential multiplier in verilog