资源列表
good
- FPGA电机电流矢量控制程序,用vhdl语言编写-vector control IP in vhdl for fpga
SDRAM
- DE2 SDRAM Controller Pin Configuration Set-DE2 SDRAM Controller Pin Configuration Set!!!
8bit_switch
- 8bit switch on FPGA with vhdl
Clock
- VHDL编写，实现时钟功能，八段数码管显示，采用结构描述方式-In VHDL, clock function, eight out digital display, the use of structural descr iption
MIPS
- 用verilog语言描述的CPU各部分及相关链接-It about CPU s component and relationship which use verilog
experimental-electronic-music
- 1、 了解普通扬声器的工作原理。 2、 使用FPGA产生不同的音乐频率。 3、 进一步体验FPGA的灵活性。 - AUDIO experimental electronic music
myproject
- 开发环境ISE，使用VHDL语言实现了任意整数分配的分频器，又有一个信号可以控制左转右转的流水等。-Development environment ISE using VHDL language to achieve arbitrary integer assigned crossover, there is another signal control Zuozhuanyouzhuan running water, etc..
Modular-Software-Defined-Radio
- 模块化软件无线电接收机 国外论文 讲得很详细-Modular software radio receiver made very detailed study abroad
waveform_-generator
- 简易信号波形发生器，可以产生四种波形，频率1k-20K步进可调。学习Verilog HDL的好例子。-imple signal waveform generator, can produce four waveform, frequency 1 k-20 k step can be adjusted. Learning Verilog good example of HDL.
oc8051
- 8051的verilog实现，内附testbench,c语言调试程序-8051 verilog achieve, enclosing testbench, c language debugging procedures
hilbert_transformer.tar
- hilbert 变换的vhdl源代码，来源于网上，本人也做过简单的8抽头的，但这个的算法还没搞懂，希望懂行的下载了研究一下，给个中文的简单的说明！-hilbert transform VHDL source code from the Internet, I have been a simple 8-tap, but even before they get to know this algorithm, I hope knowledgeable downloaded to look for a
01_PlanAhead
- planahead fpga 设计视频介绍-1-planahead fpga design demo-1