资源列表
verilog.DA.FIR..
- 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
ADControl
- 用verilog实现，ADC控制，源代码，可进行仿真-Verilog with the realization of, ADC control, source code, can be simulated
crc
- crc32的 vhdl实现源代码，对crc原理有说明-crc32 to achieve the vhdl source code, has made it clear that the principle of the crc
module
- 基于VHDL语言，设计7段LED液晶显示屏，可以下载到相关的xilinx开发板上进行验证-Based on the VHDL language, design 7 LED LCD screen, can be downloaded to the relevant board to verify the development of xilinx
10GOpenCore
- 10G Open Cores MAC which is implemented using vhdl langauge
DigitalWatchVerilog
- 一个用Verilog实现的数字跑表的程序 希望对你的设计有帮助-With the realization of a digital stopwatch Verilog process of design you would like to help
I2CVerilog
- VerilogHDL 实现了I2C 文件中包含六个程序 第一个为主程序 其余为子程序 -VerilogHDL achievement of the I2C document contains procedures for the first six the rest of the main program for the subroutine
juzhenjianpan
- 矩阵健盘设计！用了MAXPLUS软件！ 矩阵健盘设计！用了MAXPLUS软件！-juzhenjianpan
shuzinaozhong
- 一个数字闹钟的vhdl代码！ 分成几个模块 要通过自顶向下的设计方法来做！-A digital clock vhdl code! Divided into several modules through top-down design method to do!
VHDLcode_registr
- VHDL implementation of registors
booth_multiplier_VHDL
- VHDL implementation of booth multipiler
VHDLcode_gate
- different gate implementations