资源列表
pci_to_wb_latest.tar
- PCI slave to WB master
fre(1000hz)
- 基于FPGA的频率发生器，晶振频率为48MHZ，输出频率为1000Hz，经过示波器检测，实际测得频率999.988HZ，误差在0.0012 -FPGA-based frequency generator, the crystal frequency is 48MHZ, the output frequency of 1000Hz, through the oscilloscope, the actual measured frequency 999.988HZ, error 0.0012
DIV
- 最新修改 veilog 除法器，32位除16位，输出数据锁存-//divider dividend divisor* quotient+ remainder //dividend 32 bit //divisor 16 bit //quotient 32 bit //remainder 32 bit //need 32 clk to finish the calculation //start 1 start the calculation //s
TR0114-VHDL-Language-Reference
- This comprehensive reference provides a detailed overview of the VHDL language and describes each of the standard VHDL keywords (reserved words)
1553_module
- MIL-1553B RT controller output shown in BC(RT-BC) VHDL code
adc_ltc238016
- LTC238016fa VHDL execution code
adapt_filt_
- adaptive filter with two reference signal for filtering noise
keyscanverilog
- 按键消抖程序，通过FPGA实现.验证通过-Key debounce program by FPGA. Verification by
fifo_rs232
- 从FIFO到到RS232的实现，用于接收和缓存数据-TripAdvisor RS232 FIFO implementation for receiving data and cache
lcd12864
- LCD12864的驱动程序代码，亲测可用-LCD12864 driver code, pro-test available
spi_ip
- SPI总线的IP核，可以实现半双工spi通信-SPI bus IP core, can achieve half-duplex communication spi
rs232
- RS232总线协议ip，可以实现上位机通信-RS232 bus protocol ip, PC communication can be achieved