资源列表
syncram_2p
- 这个一个基于amba总线的双端口ram的vhdl语言程序-The amba bus-based dual-port ram in vhdl language program
pre_norm_div
- 一种用VHDL语言描述的浮点除前规格化的源代码编程-VHDL language used to describe a floating-point addition to the source code before the standardized programming
fpu_add
- These programs are vhdl
fifo_module
- 基于vhdl的FIFO建模，主要是用于输入输出数据缓存-Vhdl-based FIFO modeling is mainly used for input and output data cache
DDS-verilog
- DDS是直接数字式频率合成器（Direct Digital Synthesizer）的英文缩写，是一项关键的数字化技术。与传统的频率合成器相比，DDS具有低成本、低功耗、高分辨率和快速转换时间等优点，广泛使用在电信与电子仪器领域，是实现设备全数字化的一个关键技术。文件写了一个DDS的例程，并编写了TB文件。-DDS is a direct digital synthesizer (Direct Digital Synthesizer) of the English abbreviation, i
x16_to_boc32
- 16位串行数据转32位并行数据Verilog程序，已通过仿真，可用-The 16 bit serial data to 32 bit parallel data Verilog procedures, has been through the simulation, the available
UART
- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。
viterbi
- 高效率的viterbi译码，对通信中的卷积码进行译码-Efficient viterbi decoding of communications for decoding convolutional codes
spartan_3e_uart_rx
- 使用verilog语言编写的串口接送程序，波特率9600，spartan3e板子验证。-Serial Shuttle program using verilog language, baud rate 9600, spartan3e board to verify.
tst_ds162100005
- 基于VHDL的I2C程序0005,很不错的论文及程序，，大家快下啊-based on the I2C procedures VHDL 0005, a very good paper and procedures, we quickly under ah
deltasigmaconverter
- this code for delta to sigma converter-this is code for delta to sigma converter
AD9850
- 关于扫频信号源的程序 使读者更清楚地了解扫频信号源的功能及应用-Procedures on the sweep signal to sweep the reader a clearer understanding of the function and application source