资源列表
image_scaling
- Image scaling using verilog
softerror
- A Low-Cost, Systematic Methodology for Soft Error
DAC
- 信号源，数字信号转化为模拟信号输出，可以在外部设备显示-The digital signal is converted into analog signal output, and can be displayed on the external device.
4M4ppm
- 以前用verilog做的 4ppm编码，红外通信的编码解码，串口速度4Mbit每秒-Previously used verilog to do 4ppm encoding, infrared communication codec, serial speed 4Mbit per second
CCIR656-encoder
- a source code of CCIR656 encoder in verilog HDL with corresponding testbench and a snapchat of the resulting waveform-a source code of CCIR656 encoder in verilog HDL with corresponding testbench and a snapchat of the resulting waveform
FFT
- 基于FPGA的1024点fft实现VEILOG-1024 point fft based fpga
cpu
- 一个简单实现的cpu,采用vhdl编写，适合学生学习-a simple cpu
115200
- 一个可以用于工程的115200的串口程序，内含fifo，可以实现字符串的发送和接收-A can be used for engineering 115200 serial procedures, including fifo, can be achieved in the transmission and reception of the string
vhdl
- 《数字信号处理的FPGA实现（第三版）》作者：U.Meyer-Baese 的配套源码，基于quartus9.0用VHDL编写，使用的cyclone ii。其中包含FIR IIR FFT等算法的实现，对学习图像处理很有帮助。- FPGA digital signal processing (third edition) Author: U.Meyer-Baese The matching source, based on quartus9.0 prepared using VHDL, t
AD4360config
- 此代码是ADI公司的锁相频率合成芯片ADF4360配置程序，采用Verilog HDL语言编程，并且经过实验验证。-This code is ADI PLL frequency synthesizer chip ADF4360 configuration procedures, using Verilog HDL language programming, and after experimental verification.
Lab1
- Solution Lab1_Part1 FPGA
ALU
- 它的ALU设计。可以执行7个功能。这是描述在代码。这是一个工作的代码。算数逻辑单元ALU-It ALU design. 7 functions can be performed. This is described in the code. This is a working code. An arithmetic logic unit ALU