资源列表
memoria
- this file contain a simple example of a memory eeprom using vhdl
shuzijishiqi
- 基于VHDL的数字计时器,手动可控正计时和倒计时(含复位键和使能键)-VHDL-based digital timer and countdown timer being controlled manually (with the reset button and enable key)
mealy_0011_detector
- Key detector a given bit stream-Key detector a given bit stream
c3_fm_tx
- 使用CycloneIII FPGA实现纯数字FM发射机,播放WAVE格式的文件,通过FPGA数字调频,从IO发射出去-Use CycloneIII FPGA to achieve a digital FM transmitter, play WAVE format file, Digital FM modulation, transmitted by FPGA IO
c3_am_tx
- 使用CycloneIII FPGA实现纯数字AM发射机,播放WAVE格式的文件,通过FPGA数字调幅,从IO发射出去 -Use CycloneIII FPGA to achieve a digital AM transmitter, play WAVE format file, Digital AM modulation, transmitted by FPGA IO
ad7688_nios
- AD7688 ADC的SOPC系统,包含AD7688 Avalon总线接口IP,SOPC系统,NIOS软件-AD7688 ADC in SOPC system, include AD7688 avalon interface IP, sample SOPC system, NIOS software
ad7298_nios
- AD7298 ADC的SOPC系统,包含AD7298 Avalon总线接口IP,SOPC系统,NIOS软件-AD7298 in SOPC system, include AD7298 avalon interface IP, sample SOPC system, NIOS software
MacPro
- This introduces beginners on a few ways of discovering the basic details about LabVIEW 2015.
digital-clock
- vhdl文件,实现数字钟,以及其顶层设计图-This package contains the VHDL file, can realize the digital clock, contains the top-level design
frequency-meter
- 包含的vhdl文件能够测量频率,并包含需要仿真的图形- files of compressed package can measure the frequency of VHD
TB_Read_Write_File_vhd
- Simplified VHDL testbench: Read/Write from/to Text File.
mac_accumulator
- VHDL Multiplier Adder Accumulator together with Test Bench.
