资源列表
sv-design_book_examples
- system verilog design book examples
wishbone_i2c_master_vhd
- wishbone i2c master vhdl code
vhdl1
- VHDL学习文档,对入门人员和专业编程人员都有很大帮助.-VHDL study documents, for entry-and professional programmers have a great help to me.
MCDESIGN
- VHDL详尽世界观 用于成品率的的语言,请大家 参考使用,并提出宝贵建议-VHDL detailed outlook for the yield of the language, please refer to the use, and put forward valuable suggestions
Vhdl_Programming_Example
- vhdl编程语言电子书，英文的，有很多例子-VHDL programming language e-books, in English, there are many examples of
clock_module_ref
- Xilinx clock module design
VHDL_note
- VHDL是由美国国防部为描述电子电路所开发的一种语言，其全称为(Very High Speed Integrated Circuit) Hardware Descr iption Language。 与另外一门硬件描述语言Verilog HDL相比，VHDL更善于描述高层的一些设计，包括系统级（算法、数据通路、控制）和行为级（寄存器传输级），而且VHDL具有设计重用、大型设计能力、可读性强、易于编译等优点逐渐受到硬件设计者的青睐。但是，VHDL是一门语法相当严格的语言，易学性差，特别是对于刚开始
vhdl_intr
- 1. Learn the basic constructs of VHDL 2. Learn the modeling structure of VHDL 3. Understand the design environments – Simulation – Synthesis-1. Learn the basic constructs of VHDL2. Learn the modeling structure of VHDL3. Understand the design
verilog_intr
- Verilog Overview n Basic Structure of a Verilog Model n Components of a Verilog Module – Ports – Data Types – Assigning Values and Numbers – Operators – Behavioral Modeling • Continuous Assignments • Procedural Blocks –
verilog_slides
- What is Verilog? ➥ Verilog HDL is a Hardware Descr iption Language (HDL) ➥ Verilog HDL allows describe designs at a high level of abstraction as well as the lower implementation levels ➥ Primary use of HDLs is the simulation
hdladvance
- Advanced HDL Design Training On Xilinx FPGA-Advanced HDL DesignTraining On Xilinx FPGA
matrix
- Implement the Matrix function about 16bits on FPGA BOARD