资源列表
FIFO_Example2
- 用Verilog语言写的FPGA FIFO，仅供参考。
ADC_16bit
- 模数变换器，采用verilog hdl编写-Analog-to-digital converters, used to prepare verilog hdl
AD_ctrl
- 用VHDL编程实现的基于FPGA的adc0809和ad1674的控制模块，做数据采集的朋友可以看一下。-VHDL Programming with FPGA-based control adc0809 and ad1674 modules, data acquisition so friends can see.
traffic_control
- verilog语言实现的交通灯控制程序，能同时对两个方向的交通进行控制-it is a traffic control program that control two way traffic, written in verilog language
LCD
- T6963C控制器图形液晶模块VHDL控制代码-T6963C Graphic LCD module controller VHDL control code
DS1302_NIOSII
- nios ii 软核的ds1302（模拟spi接口）总线驱动函数及函数声明-nios ii soft ds1302（spi） bus driver functions and function declaration
wirelessSend
- 无线模块PTR6100的verilog数据发送控制代码-code of the wireless module of PTR6100 based on verilog
i2cSlave_2
- Verilog source for i2C Slave device
cdce72010_spi_ctrl
- TI PLL cdce72010 SPI Controller
c3
- VerilogHDL编写的8位加法器实现-bgfhgfhjgjhgj
dct
- 基于FPGA的图像压缩算法程序，自己写的，可以参考一下-FPGA-based image compression algorithm, write your own, you can refer to
lcd
- FPGA 控制LCD12864液晶显示屏，通过12864显示一副图片-FPGA control LCD12864 LCD displays a picture by 12864