资源列表
jkmk
- 用EDA编的程序 是关于电子钟的很有参考价值-The program is compiled with the EDA on the electronic clock of great reference value to
ROM
- 用于rom的存入地址，尽可能地增加稳定性-Rom the stored address for as much as possible to increase stability
verilog
- 一个可以综合的Verilog 7段秒表实例。上海交大微电子学院课程作业。-An example Verilog project. 7-segment
pal16r8
- manual vhdl descr iption
LAB-PROGS1
- VHDL Programmes -1 for dumping on FPGA
code2
- 四后问题算法和克鲁卡斯尔算法的具体实现算法，已经运行过了。
sgpio_target_v0_3
- sgpio target module, flexible hard drive amount.-sgpio target module, flexible hard drive amount.
bxfsq
- 运用单片机产生正弦波的源程序，可移植性比较好。-The use of single-chip generated sine wave source, portability is better.
ofdm
- ofdm调制解调的fpga实现。使用Verilog实现IEEE 802.16a系统的调制解调模块。-ofdm modulation and demodulation of fpga implementation. Verilog implementation using IEEE 802.16a system, modem module.
digital-clock
- Digital clock applicatian using seven segment with fpga xilinx
CPLD-AT89C51com
- 可编程逻辑器件cpld与单片机双向通信的源程序
McBSP_to_SPI
- fpga开发的程序，内容都不错，主要是to