资源列表
advconfig
- 在Xilinx Zynq开发板上，通过IIC进行ADV芯片的配置。-In the Xilinx Zynq development board, ADV chip through the IIC configuration.
DULE-RAM
- 基于VERILOG的双口ram例子，比较简单，不是很复杂，入门了解就可以了。-Based on dual port ram VERILOG example, the relatively simple, not very complicated, entry understand it.
project
- 南京地铁，根据始站和终站，自动计算票价。-Nanjing subway station， based on the beginning and the end station, automatic calculation of fares.
clock18div
- Clock Divider, divfactor of 18
Digital_Filter_FPGA
- Digital Filter in VHDL
SR_SerIn
- Shift Register, Serial In Parallel Out VHDL
Testbench_SR_SerIn
- Testbench for Shift Register, Serial in Parallel out
TLC5510
- TLC5510的驱动程序，采用Verilog语言编写-TLC5510 driver, the use of Verilog language
LCD12864
- 用Verilog语言编写的LCD12864显示驱动程序，简单实用-Using Verilog language LCD12864 display driver, simple and practical
LCD1602
- LCD1602驱动程序，采用Verilog语言编写-The LCD1602 driver, the use of Verilog language
VGA11
- 自制VGA接口显示，用Verilog语言编写-Homemade VGA interface display, using Verilog language
wave_gen
- 波形发生器，可以产生正弦波，锯齿波，方波。Verilog语言编写-Waveform generator, can generate sine wave, sawtooth wave, square wave. Verilog language