资源列表
fpga-pulse_sequence
- pulse_sequence.vhd 并行脉冲控制器 light.vhd.vhd 交通脉冲控制器 division1.vhd 电压脉冲控制器中的分频 ad.vhd 电压脉冲控制器中的A/D控制 code.vhd 电压脉冲控制器中的脉冲运算模块 voltage2.bdf 电压脉冲控制系统-pulse_sequence.vhd pulse controller parallel light.vhd.vhd traffic controller division1.vhd puls
13
- para13： fifo.vhd FIFO（双口RAM） fifo1.vhd FIFO（嵌入式EAB） fifo2.vhd FIFO（LPM）-para13: fifo.vhd FIFO (dual port RAM) fifo1.vhd FIFO (embedded EAB) fifo2.vhd FIFO (LPM)
gvhdl
- 近百个vhdl的器件编程,虽然个别较为简单,但都很实用,对于初学者会有很大帮助-Device close to a hundred VHDL programming, although the individual is more simple, but very useful, would be of considerable help for beginners
uart_tran
- UART串口的传送verilog原程序，已经经过了编译仿真-Verilog UART serial transmission of the original procedure has been compiled after a simulation
reset
- 用VHDL进行DSP5416开发板的复位 用VHDL进行DSP5416开发板的复位-Use VHDL to reset the DSP5416 development board using VHDL for DSP5416 development board reset
VHDL_180_code
- 包含了vhdl的经典的180个编程代码的实例，很有实际用途-VHDL contains 180 of the classic examples of programming code, it is the actual use of
100_VHDL
- 100个经典的编程的实例，很适合借鉴，搬用-100 classic examples of programming, it is appropriate to draw on, apply mechanically
4.1
- VHDL学习的基础教程，是eda技术使用教程的第四章节知识总结。-VHDL Tutorial learning is the use of EDA technology tutorial summary of the fourth chapter of knowledge.
inverter
- rc5的decryption，同样带state machine，同样有四个状态-RC5 of decryption, with the same state machine, the same four state
RC5_inv
- 不带state machine的decryption of rc5-State machine without the decryption of rc5
c15_add
- 精通verilog HDL语言编程源码之1--常用加法器设计-Proficient in programming language source verilog HDL of 1- Common adder design
c16_multiple
- 精通verilog HDL语言编程源码之2--常用乘法器设计-Proficient in verilog HDL source language programming of 2- Common Multiplier