资源列表
lcd
- 改VHDL程序通过简单算法实现 宫殿显示 可供初学者参考，极有价值！-VHDL procedures changed through a simple algorithm for beginners palace show reference, very valuable!
niosii_eval_layout
- altera公司最新的cyclone3的技术文档-altera
motor_control
- LIBRARY IEEE USE IEEE.STD_LOGIC_1164.ALL USE IEEE.STD_LOGIC_ARITH.ALL USE IEEE.STD_LOGIC_UNSIGNED.ALL
FPGAforDLC
- 采用Altera公司的FPGA芯片，在MAX+plus II软件平台上实现多路HDLC电路-Using Altera s FPGA chips, in MAX+ Plus II software platform to achieve multi-channel HDLC circuit
verilog
- 一组练习，关于VHDL的一些基础的知识和练习可以参考一些具体的问题-A group of exercises, on a number of VHDL-based knowledge and practice can refer to some specific questions
picoblaze_test_700AN
- Xilinx PicoBlaze application developed in ISE10.1.3.
20051230
- 电子密码锁程序，密码输入正确之后，锁就打开，如果输入的三次的密码不正确，就锁定按键3秒钟，同时发现报警声-Electronic code lock procedure, enter the correct password, the lock will open, if entered incorrect password three times, on the lock button 3 seconds, also found the sound alarm
digi_clock2.7z
- 數位電子時鐘 用自製圖檔製成 不是用quartusII 內建的圖檔製成 -Digital electronic clock with self-image made of instead of the built-in image quartusII made
DE2_LCM_CCD_onchip.7z.RAR
- 將DE2連接到LCD版面上 內為友晶客科技公司所附製的程式碼-DE2 will connect to the LCD layout for Terasic off technology companies attached to the system code
coswave
- 主要是通过Altera公司的Cuclone系列的FPGA-EP1C3T144C8产生余弦波的源代码 基于LPM-ROM余弦波一周期含有256个10位数据；-Mainly through Altera s Cuclone series of FPGA-EP1C3T144C8 cosine wave generated source code based on the LPM-ROM cosine wave of one cycle containing 256 10-bit data
sjcj
- 通过ADC0809对模拟信号进行采样，然后将转换好的8位数据迅速转存到FPGA内部存储器中，同时增加一个锯齿波发生电路，扫描时钟与地址发生时钟一致。由此完成一个示波器功能！-Through ADC0809 carried out on the analog signal sampling, and then a good 8-bit data conversion转存到rapid internal FPGA memory, at the same time increase the occurr
1eda0085-fd56-4ea7-bc6a-c598493929b5
- VHDL在SOURCEINSIGHT的插件-VHDL in SOURCEINSIGHT plug-ins