资源列表
xulie
- FPGA或CPLD与DAC（DAC0800），产生一个序列检测器。-FPGA or CPLD with the DAC (DAC0800), produce a sequence detector.
lock
- 功能： 1、 密码输入：每按下一个键，要求在数码管上显示，并依次左移； 2、密码清除：清除密码输入，并将输入置为”0000”； 3、密码修改：将当前输入设为新的密码； 4、上锁和开锁。-Features: 1, enter the password: press a key for each request in the digital tube display, and turn left 2, password clear: to remove the password i
systemc_ex
- systemc源码， 入门级， 超好用！ systemc源码， 入门级， 超好用！ 易懂-SystemC source, entry-level,超好用! SystemC source, entry-level,超好用! Understand
P8051
- This a FREE tool chain which compiles C codes into 8051 binary code, converts the binary to RTL ROM, and simulate in Modelsim. SDCC is the compiler. Example compilation: cd compile sdcc --iram-size 0x80 --xram-size 0x800 t8051.c RE
ASYNCFIFOXPXMOD
- 任意时钟配比的异步fifo.含有synplify ip库中的双端口ram。用于处理多时钟域问题。-Arbitrary ratio of asynchronous clock fifo. Containing synplify ip library of dual-port ram. Used to deal with the issue of multi-clock domain.
vrilog
- 包含交通灯实现等几个vrilog硬件编程的程序，基本均为老师亲自写的范本，供我们参考用的-Contains several traffic lights to achieve vrilog hardware programming procedures, teachers are personally write the basic template for our reference
Verilog-book
- 学习Verilog语言必备资料，包括语法总结 编写Verilog HDL 源代码的标准及设计流程-Verilog language learning essential information, including syntax summary of Verilog HDL source code for the preparation of standards and design process
Verilog_for_study
- Verilog黄金参考指南，硬件学习必备的知识！-Verilog Golden Reference Guide, hardware learning essential knowledge!
verilog_language
- Verilog学习全部资料，学习的同志赶快收了-Verilog learning all the information, learning comrades as soon as possible upon receipt of a
MODELSIM
- 2008自由电子FPGA开发板介绍MODELSIM经典教程-2008 free-electron FPGA development board, introduced the classic ModelSim Tutorial
digital_clk
- 该工程的主要功能是由VHDL语言实现多功能数字电子时钟-The project s main function is to achieve by the VHDL language multifunction digital electronic clock
song
- 音乐，梁祝，其中应用VHDL编写的全过程梁祝。-Music, Butterfly Lovers, in which the application of VHDL to prepare the whole process of Butterfly Lovers.