资源列表
Verilog_VGA
- 一个是用Verilog的程序 还可以用 -One is to use Verilog procedures also can be used
VHDL
- 1 8位加法器的设计 2 分频电路 3 数字秒表的设计-1 8 adder design of 2-circuit design of 3 digital stopwatch
i2cverilog
- 采用verilogHDL编写的I2C接口及SPI接口模块，经过测试 相当不错 COPY过去可直接使用-VerilogHDL prepared using I2C interface and SPI interface module, tested pretty good the past can be directly used COPY
VerilogDHL_clock
- 新来匝道穿上别人写的基于vhd的数字时钟很好大家看看啊，很规范的哦。-New ramp to wear someone else wrote vhd on the digital clock very well take a look at the ah, oh, very norms.
adder4
- 是用verilog写得加法器以及计数器里面有测试文件（testbench），对于初学者来说这个可以用来参考下-Is written in Verilog adder and counter inside a test file (testbench), for beginners this can be used to reference the next
02_VHDL_program`structure
- 这个是关于vhdl的程序语言结构的ppt,很哈的啊，好不容易从老师那讨来的-This is the procedure on the VHDL language structure ppt, Kazakhstan ah very hard to learn from their teachers to discuss it
03_strcture_3
- VHDL的结构2，也是和前面传的那个来源于一个老师，可以说是老师的心得哦-VHDL structure of 2, and in front of Chuan is also derived from a teacher that can be said to be the teacher s experience oh
04_VHDL_langvage_content
- VHDL的语言的要素呵呵翻译不好啊，也是和前面传的那个来源于一个老师，也可以说是老师的心得哦-VHDL language translation is not good huh elements, but also and in front of a mass that comes from teachers, teachers can also be said that the experience oh
3fp
- 奇数分频和倍频(只需修改参数就可以实现较难得基数分频和倍频)-Odd frequency and frequency-doubling (just modify the parameters can be achieved relatively rare sub-base frequency and octave)
VHDLProgrammingandImplementation
- VHDL 设计与实现的完整代码，很好的学习资料-VHDL Design and Implementation of a complete code, good learning materials
VHDLPROGRAMMINGGUIDE
- VHDL的编程的参考指南，周立功的内部资料-VHDL programming reference guide, Zhou Ligong internal information