资源列表
Div
- VHDL新手入门：10分频器的实现 附带波形仿真 -VHDL Getting Started: 10 dividers with waveform simulation implementation
Full_adder
- VHDL新手入门：全加器的实现及仿真，输入量为两个不同频时钟-VHDL Getting Started: full adder implementation and simulation, input clock frequency for the two different
DIGITAL_CLOCK_TEST
- 数字钟的FPGA实验，挺好用的，修改了一般代码的频闪问题，时间不准的问题，应用于CYLONE2平台及外借数码管-Digital clock FPGA experiments, very good use, modify the general code of strobe, time allowed to question, and the loan application CYLONE2 digital platform
ALTERA
- altera公司器件的选型手册，做fpga设计者必备文件，没有的可以参考下-altera manual selection device companies, fpga designer to do the necessary documents, can not refer to the following
conv_enc
- 该程序文档是用verilog实现卷积码的编码和解码，报告中从原理进行详细的分析，代码程序也有详细的备注-The program document is to achieve convolutional code with verilog coding and decoding, the report analysises the principle ,the code also has a detailed program note.
FIR-lv-bo-code
- 此代码为FIR滤波器的设计源码，并对其代码做了相应的改进，综合仿真结果成功-This code source code for the FIR filter design, and the code does a corresponding improvement, integrated simulation results successfully
IC-149
- Top-down Implementation of Pipelined AES Cipher
BmpDecoder
- 适用于Altera FPGA Nios II平台uClinux OpenCV之BmpDecoder的源码-Souce code of BmpDecoder for Altera FPGA Nios II uClinux OpenCV
FPGA-Design-Guide
- 对于FPGA设计的一些指导性原则进行讲述。是初学者不错的指导书籍。-FPGA design for some of the guiding principles described. Is a good guide book for beginners.
stepmot
- 主要是对矩阵键盘的Verilog HDL 语言的设计实现-Mainly for matrix keyboard Verilog HDL Language Design and Implementation
voxel_image
- image descr iption ri really good
RS232-RefComp
- 非常实用的关于串口的vhdl语言程序，与pc机通信-Very useful on serial vhdl language program, computer communication with the pc