资源列表
PIC-SPI
- PIC16F877A进行SPI通讯，将数据发送给25C040，同时显示从25C040读出的数据-PIC16F877A for SPI communication, the data sent to the 25C040, also shows the data read out from the 25C040
Schmitt-trigger-keyboard-interface
- 基于施密特触发的键盘接口电路，有效降低触发延迟，缩短键盘反应时间 以verilog实现-Schmitt trigger on the keyboard interface circuit, effectively reducing the trigger delay and shorten the reaction time to verilog implementation keyboard
digicnt1
- 24小时正、反计时器。通过2个按键实现归零及正、反计时，带有暂停和恢复按键。48MHz晶振，7段数码管输出。-24 hours of positive and negative timer. Achieved through two key zero, and positive and negative time, with a pause and resume button. 48MHz crystal, 7 segment LED output.
Verilog
- 在Verilog中有两种类型的赋值语句：连续赋值和过程赋值。赋值表达式由三个部分组成：左值、赋值运算符（=或<=）和右值。右值可以是任何类型的数据，包括net型和register型；但对连续赋值，左值必须是net类型的数据；而过程赋值，左值必须是register类型的数据。下面将作详细描述-There are two types in the Verilog assignment statement: continuous assignment and process assignment
digital-system-design
- 基于VHDL语言的七段显示管程序， 实现9个数字循环 并且能控制播放速度-SEVEN SEGMENT DISPLAY
Simple_3bit_counter
- 3bit counter based on verilog, a simple application.
lcd-ip-core
- LCD 驱动的IPCORE，可用于alteraFPGA-LCD driver IPCORE, can be used to alteraFPGA
KamaruAdzhaKadiranKPFKE2005TTT
- DESIGN AND IMPLEMENTATION OF OFDM TRANSMITTER AND RECEIVER ON FPGA HARDWARE
FULLTEXT01
- IMPLEMENTATION OF AN IEEE 802.11A TRANSMITTER IN VHDL FOR ALTERA STRATIX II FPGA
SOU
- 这是用C写的正弦函数定点数据生成代码，内容是生成verilog中RAM或者ROM和Matlab处理时的所用的数据。-It is written with C fixed-point data generate code sine function, the content is generated verilog RAM or ROM, and Matlab in the processing of the data used.
bfly_r2dit
- 这是一个用verilog编写的FFT的蝶形因子程序，它与下面的文件构成整个FFT程序-This is a written with verilog program FFT butterfly factor, file it with the following procedures constitute the whole FFT
SCCIISPEC
- 国产32位cpu，ssx45芯片的datasheet，这款芯片内嵌国产ssf33算法和scb2算法的ip核-ssx45 chip datasheet