资源列表
signal
- 在QuartusII软件环境下，运用VHDL语言编写的信号发生器的实现，包含仿真波形-In quartusii software. use vhdl language of signals to the realization of programme- and emulation waveforms
ofdmbaseband
- the OFDM PHY is adaptive therefore it supports multiple schemes BPSK, QPSK, 16-QAM and 64-QAM for data carriers’ modulation. The constellation diagrams are gray mapped and shows the magnitudes I and Q (In-phase and Quadrature) components of e
ce
- 51单片机程序代码可以共享，需要的继续练习-51 microcontroller code can be shared
pc8_1
- MAX+PLUS II BASELINE Version 8.1 Software
IEEE802.3FrameFormat
- IEEE 802.3u (100Base-T)是100兆比特每秒以太网的标准。100Base-T技术中可采用3类传输介质，即100Base-T4、100Base-TX和100Base-FX，它采用4B/5B编码方式-IEEE 802.3u (100Base-T) is 100 megabits per second Ethernet standard. 100Base-T technology in the transmission medium can be used three catego
Oscilloscope_V1.0
- XAPP Oscillscope VHDL code
XAPP146_VoltMeter_ver1.1
- XAPP146 VOLTMETER VHDL Code
XAPP147_SRAM_TEST
- XAPP147 SRAM TEST VHDL code
Customer_Pack_Rev1
- XAPP356 customer pack VHDL code
saa7113h
- 二个程序，一个是用VHDL语言对SAA7113的初始化，于串口将初始化内容读出，另一个是读取SAA7113寄存器内的值于串口发送出来-Two procedures, one for VHDL language SAA7113 initialization, the contents will be initialized in the serial read out, the other is the value of reading the SAA7113 register send out
FPGAnote
- 北理FPGA讲义，主要是FPDA的入门，包括VHDL，FPGA结构，开发软件的运用。-North rationale FPGA handouts, mainly FPDA entry, including VHDL, FPGA structure, development of software applications.
_5_lcd1602_test
- 基于nios的1602显示处理，并不是io口模拟驱动的，而是用verilog写好的驱动程序-Nios display processing based on the 1602, not io port simulation-driven, but with drivers written verilog