资源列表
FIFO
- 先进先出存储器A 511x8 FIFO with Common Read/Write Clock 带读写时钟-A 511x8 FIFO with Common Read/Write Clock
FSMwithOutputsDecode
- 有限状态机FSM with Outputs Decoded in Parallel Output Register-FSM with Outputs Decoded in Parallel Output Register
FSMwithOutputsEncodedwithinStateBits
- FSM有限状态机FSM with Outputs Encoded within State Bits-FSM with Outputs Encoded within State Bits
HighSpeedFIFOsInSpartan-IIFPGAs
- This application note describes how to build high-speed FIFOs using the Block SelectRAM+ memory in the Spartan™ -II FPGAs. Verilog and VHDL code is available for the design. The design is for a 512x8 FIFO, but each port structure can be chan
fifo
- fpga中fifo的基本原理介绍了fifo的基本原理以及对fifo实现方法的阐述。-The basic principle in fpga fifo fifo introduced the basic principles and methods of implementation described fifo.
h264_2008
- 编解码的算法优化研究及FPGA的硬件实现-encoder fpga
sdr_sdram
- sdram控制器，verilog语言写的-sdram controller, verilog language to write
elpiano
- 自己写的FPGA实现电子琴的VHDL程序，曲目是两只老虎，用到一些模块，和片内存储间，-FPGA realization of his keyboard to write the VHDL program, tracks are two tigers, a number of modules used, and on-chip storage room, huh, huh
iso8583
- iso 8583 processing code and values-iso 8583 processing code and values
four_selsect
- 在QuartusII软件环境下，编写的四选一功能的实现，包含仿真波形-Quartusii software in the circumstances, to write a function of the implementation of a simulation waveforms
frediv16
- 在QuartusII软件环境下，运用VHDL语言编写的分频功能的实现，包含仿真波形-In quartusii software. use vhdl languages of the frequency of the implementation of a simulation waveforms
f_add
- 在QuartusII软件环境下，运用VHDL语言编写的全加器的实现，包含仿真波形-In quartusii software. use vhdl languages of the implementation of a simulation waveforms