资源列表
FSMso-s3
- 有限状态机实现 自己做的 参考下-Finite state machine implementation
32mips-cpu
- 基于32为MIPS指令设计的cpu，32 for the MIPS instruction based on the design of the cpu-32 for the MIPS instruction based on the design of the cpu
VHDL
- 基于 VHDL平台 的NRZ码 转HDB3码 程序-NRZ-> HDB3 coding based on VHDL
LIP1732CORE_system_mbus_arbiter
- System Verilog M bus arbiter module
LIP1742CORE_sdio_rx_fsm
- Verilog SDIO RX FSM module-Verilog SDIO RX FSM module
LIP1743CORE_sdio_tx_fsm
- Verilog SDIO TX FSM module
VGA_Verilog
- 文件中包含EP2C8Q208C8系列FPGA的VGA口的语言程序，可以直接在硬件板子上使用，以经过测试-File contains EP2C8Q208C8 Series VGA port FPGA-language program, you can use directly on the hardware board to be tested
ADV7123_a
- VCG显示器接到DE2板上的操作步骤，和其中的工作原理。-VCG display the steps receiving the DE2 board, and one of the work.
digitaldownconversionbygpga
- 研究了高倍抽取的数字下变频设计，重点分析了基于级联积分梳状滤波器和级联半带滤波器的多级抽样频率算法。-Extraction of the high-powered digital down-conversion design, the focus of a cascaded integrator comb filter based on cascaded half-band filter and the multi-level sampling frequency algorithm.
work
- 增量式正交光电解码盘FPGA verilog-Incremental orthogonal optical disk FPGA verilog decoder
led
- VHDL用语言所写的液晶屏驱动程序，文本为word-VHDL
adc_tlc549_1
- tlc549 赛灵思fpga 串行AD输出八位分辨率-tlc549 fpga