资源列表
1270
- cpld外部带有很多设备，dsp需要对每个设备进行访问，这是对每个设备进行译码的程序-cpld with a lot of external devices, dsp need to visit each device, which is a decoding program for each device
be59e2f1-3eb0-45bc-ac60-dcd988cd2604
- 很有用的fpga学习资料，初学者必备。可以从代码看起，对学习uart协议也很有帮助。-Fpga learning useful information, essential for beginners. Looks from the code, uart protocol is also helpful for learning.
ethernetMAC_specification
- 10M/100/以及1000M以外网MAC设计所需的详细说明书-10M/100/1000M outside the network and MAC design required detailed instructions
eeprom1
- nios II下EEPROM程序设计，EEPROM采用24LC04，包括读写程序，读程序包括随机读，当前读，连续读。写包括随机写，页写。-nios II under the EEPROM programming, EEPROM with 24LC04, including literacy programs, reading programs, including random read, the current reading, continuous reading. Write includ
0123744385NanometerFPGAs
- low power design of nanometer fpgas
keypadscanner
- keypad scanner vhdl code
LIP1251CORE_pll
- Digital PLL Verilog module
LIP1241CORE_hs_dll
- HS DLL Verilog Module
SOPC_intro
- sopc builder的中文介绍，台湾人写的，比较简单，适合初学者-Chinese introduction of sopc builder
DDR_SDRAM_design_and_conclusion
- DDR SDRAM总结文档，描述了DDR IP的设计挑战，接口时序，模块设计原则，调试技巧及应用指南-DDR SDRAM summary document describing the design challenge of DDR IP, interface timing, modular design principles, debugging skills and Application Guide
FPGA_parallel_serial_conversion
- FPGA的并行串行转换实例，两个.vhd文件-FPGA parallel serial conversion instance, two. Vhd files
vhdl1
- vhdl设计实例一：时序逻辑，组合逻辑的设计实例-vhdl Design Example One: sequential logic, combinational logic design example