资源列表
BCDMULTIPLIER
- BCD MULTIPLIER PROGRAM
Multisim
- multisim 程序 使用教程 详细明了清楚-multisim tutorial program uses more clearly understand
FTClean
- Connect OBD connector to car diagnostic socket. Then connect hardware interface to any free USB port of your PC or laptop. Start program VagTacho.exe. Select ECU from menu. If you don t know type of kombiinstrument, press Connect Any Tacho button
4BITMULTIvhdl
- 4BIT MULTI VHDL乘法器4位元VHDL實現-4BIT MULTI VHDL
vhdl
- 实现60进制计数 二十字街啊？我靠还不够-Count 20 words of 60 binary implementation Street ah? I rely on is not enough
gh_uart_16550_072108
- UART（通用串行收发器）的VHDL源代码，适合硬件工程师在FPGA内部实现多个UART-UART (universal serial transceivers), VHDL source code for hardware engineers in the FPGA to achieve multiple internal UART
ethernet_tri_mode
- 三态以太网的hdl源代码，适合FPGA工程师使用-Tri-State Ethernet hdl source code for FPGA engineers
afifo
- verilog编写的异步FIFO代码，功能仿真时是正确的。-verilog code written in asynchronous FIFO, functional simulation is the right time.
sdcard_mass_storage_controller_latest..tar
- SD卡控制器，适合硬件工程师在FPGA内部实现SD 控制器-SD card controller FPGA for hardware engineers in the internal implementation of SD Controller
sfifo
- verilog编写的同步FIFO，功能仿真完全正确，大家可以参考下。-verilog write synchronization FIFO, functional simulation completely correct, we can refer to the next.
uart_control
- 用verilog 实现的简易串口驱动模块儿，引脚简单，易用，可自己增减配置-verilog uart
veriloguart
- 简易的串口模块儿驱动程序，用verilog语言描述，自己可以进行增加或裁剪-verilog uart