资源列表
an487_CN
- 利用 MAX II CPLD 实现 SPI至I 2S 的接口-used the MAX II CPLD to implement the SPI interface with I2C
kb_code
- a source code of interface between keyboard and FPGA.
27fpgashili
- 基于FPGA的27哥实例代码——包括自动售货机，出租车计价器等的源程序代码-27 Columbia-based FPGA example code- including vending machines, taxi meter, etc. of the source code
Freq_kx11
- 用51单片机的定时计数器0脉冲进行计数，并用LCD1602显示，如果脉冲特性好，精度可以达到1Hz，带宽1Hz-50KHz（系统时钟12M）-With 51 SCM timing counter pulse count, and 0 LCD1602 shows that if the pulse, precision can reach 1Hz, 1Hz bandwidth 50KHz- 12M clock (system).
I2C
- I2C 接口 用VERILOG 实现的基于FPGA的I2C slave -FPGA I2C SLAVE
leddot
- 利用led实现汉字的滚动显示，可以下载到FPGA中进行演示-Use of Chinese characters led to achieve the rolling, it can be downloaded to the FPGA, demonstrate
pp
- 实现的是乒乓球运动并计分的VHDL设计，已经通过仿真，有条件可以下载-Implementation is table tennis and scoring VHDL design has been through the simulation conditions can be downloaded
The.Verilog.Hardware.Description.Language.Fifth.Ed
- 这本书主要介绍了硬件描述语言verilog，通过学习可以更好的掌握这门语言，有利于自学-This book introduces the hardware descr iption language verilog, by learning to better master this language is conducive to learning
51
- 51单片机IP核，内含两个压缩包和文档。-51 MCU IP core, containing two compression packages and documents
verilogxuexiziliao
- 学好fpga必备的语言：verilog hdl语言 它能帮助你学号verilog语言 并为fpag的学习打好坚实的基础-Fpga necessary to learn the language: verilog hdl language can help you to learn the language and the fpag No. verilog lay a solid foundation for learning
digital_lock
- 数字锁即电子密码锁。锁内有若干密码，所有的密码可以用户自己设定。数字锁有两类： 一类是平行接收数据，称为并行锁；一类是串行接收数据，称为串行锁。如果输入代码与锁 内密码一致，锁被打开；否则，应封闭开锁电路，并发出报警信号。-Digital lock or electronic lock. There are a number of lock password, all passwords can be user set. Digital lock there are two ty