资源列表
adaptive_filtering
- fundumental Adaptive filtering
structuralbehaviouraldecodervhdl
- A structural and behavioral modeling of a decoder
MAPdecodingexample
- MAP decoding is a simple method to decode turbo codes
Mimasuo
- 设计要求(黑体小四，1.5倍行距，段前0.5行) 1）密码预先在内部设置，可以设置任意位密码，这里采用6位十进制数字作为密码； 2）密码输入正确后，密码器将启动开启装置。这里密码器只接受前6位密码输入，并以按键音提示，多余位数的密码输入将不起作用； 3）允许密码输入错误的最大次数为三次, 密码错误次数超过三次则进入死锁状态, 并发出警报 4）报警后，内部人员可以通过按键SETUP使密码器回到初始等待状态； 5）密码器具有外接键盘，可以用来输入密码和操作指令； -Desi
kvga2
- Nondominated GA for optimization
FPGA-HDLC-design
- 基于FPGA的HDLC协议控制器的设计。FPGA-based HDLC protocol controller design. Pdf-FPGA-based HDLC protocol controller design. Pdf
fast_antilog_latest.tar
- Anti-Logarithm (square-root), base-2, single-cycle
cf_fp_mul_latest.tar
- CF Floating Point Multiplier
AsicVhdlBasicLab_Vhdl
- Asic Vhdl Basic Ans Lab_Vhdl Examples_microprocessor (VHDL)desingn
vhdl-pipeline-mips_latest.tar
- pipeline mips in vhdl
rfid_latest.tar
- rfid tag and reader with VHDL for FPGA
Constraint-Based-Verification
- 系統化驗証方法及實例探討Assertion, Constraint synthesis-Electronic Design complexity getting higher, the verification work needs to be fully understood