资源列表
PS2KEY
- 用VERILOG语言实现的PS2键盘的读取键码程序-PS2 KEY DRIVER
VGA
- 用VERILOG语言编写的VGA时序控制程序,可实现对液晶显示器的控制-VGADRIVER
dianziqin
- 本源码讲解了电子琴的设计思想以及源代码的编写方法。-The source explained the keyboard design ideas, as well as the compilation of source code.
matrix
- 该源代码是控制16*16点阵的VHDL语言描述，可以让点阵连续显示设置的汉字。-The source code is to control 16* 16 lattice VHDL language descr iption, allowing a continuous dot-matrix display settings of the characters.
traffic
- 该文件包括全部的交通信号灯控制的VHDL源代码以及顶层原理图的设计，七种恰当的采用了状态机，功能完全正确而稳定。-This document includes all of the traffic lights controlled by the top-level VHDL source code, as well as schematic design, the appropriate use of the seven kinds of state machines, function en
lcd_1602
- 该代码是用VHDL语言写的，用来控制LCD1602液晶显示器，功能正确。-The code is written in VHDL language to control the LCD1602 LCD display, function correctly.
vga1012
- VHDL实现VGA显示的横竖彩条，可以进行横彩条，竖彩条的显示控制，包括源码和全部工程文件-VHDL achieve horizontal and vertical color VGA display article can be horizontal color bars, vertical color bars display control, including source code and all engineering documents
LEDVHDL
- FPGA驱动LED静态显示 FPGA驱动LED动态显示（4位）-FPGA-driven FPGA-driven LED Display LED static dynamic display (4)
FSK_modulation_VHDL
- FSK调制的VHDL程序，有详细注释，并在最后附上仿真图，方便理解和验证。-FSK modulation of the VHDL program, detailed annotations, and attach a simulation of the final map, to facilitate understanding and validation.
IEEE_standard_verilog
- 其中，Verilog硬件描述语言（HDL）的定义，在这个标准。 Verilog的HDL是一个正式的符号中的电子系统创建的各个阶段使用。因为它既是机读和人类可读的，它支持开发，验证，综合，硬件设计和测试，对数据通信的硬件设计，以及维修，改装和硬件采购。这个标准的主要对象是工具的实现者支持的语言和语言的高级用户。-The Verilog Hardware Descr iption Language (HDL) is defined in this standard. Verilog HDL is a
FSK_demodulation_VHDL
- 基于FSK解调的VHDL程序，有详细的注释说明，并在最后附上仿真图，便于理解和验证。-VHDL-based FSK demodulation process, a detailed explanatory notes, and attached in the final simulation map, easy to understand and verify.
URAT_transmitter_receiver_VHDL
- 基于UART的VHDL程序，包括顶层程序、波特率发生器程序、UART发送器程序、UART接收器程序4部分程序。有详细注释，并在每个程序后附上一张仿真波形图，便于理解和验证。-UART in VHDL-based procedures, including the top-level procedures, procedures for the baud rate generator, UART transmitter program, UART receiver program four par