资源列表
HEX_1F
- 本实验的功能为：每过一秒，阴极数码管从0循环演变到F-The function of this experiment as follows: with each passing second, cathodic evolution of the digital control loop from 0 to F
reed_eeprom
- This code read EEPROM I2C (for NIOS2).
irq
- Universal Initiolizator processings of interruptions (for NIOS2)
AT24C04
- read AT24C04 (for NIOS2)
AD5320BRM
- Management DAC AD5320BRM (for NIOS2)
ADF4106
- Management of synthesizer ADF4106
jtd2
- 基于VHDL状态机设计的智能交通控制灯 总体设计结构框图如图2所示，共有11个功能模块，包括控制东西方向交通灯的状态机和控制南北方向交通灯的状态机、计数器模块、键盘扫描模块、数字合成模块、三个分位模块、数码管显示模块、动态显示扫描模块。-VHDL-based state machine design of intelligent traffic control lights
test_bram
- 用FPGA实现bram测试，sparden 3s 250e-With the FPGA to achieve bram test, sparden 3s 250e
vga_16
- FPGA实现vga显示，sparden 3s 250e-FPGA realization of vga display, sparden 3s 250e
ps2
- FPGA实现ps2键盘控制，sparden 3s 250e-FPGA realization of ps2 keyboard, sparden 3s 250e
Modular_Multiplier-modmult
- DEFINITELY FRUITFULL FOR RSA ENCRYPTION
RSACypher
- FUITFULL FOR RSA ALGORITM IN VHDL