资源列表
traffic_light
- module traffic(CLK,EN,LAMPA,LAMPB,ACOUNT,BCOUNT)
clock
- 多功能数字钟Verilog HDL的源码，能够整点报时，报整点数，设定任意时刻闹钟，低音高音两种频率。-Multi-function digital clock Verilog HDL source code, set the alarm clock at any time, bass treble two frequencies. It s for FPGA.
light
- 汽车尾灯控制电路，一共有七个状态，数电设计实验的作业，左转，右转，刹车，倒车，左转刹车，右转刹车，正常行驶。-Automobile taillight control circuit, a total of seven states, several electric design of the experiment operations, turn left, turn right, brake, reverse, turn left brake, right brake, normal dr
traffic
- 交通灯的VHDL实现，使用状态机来实现，适合初学者-VHDL implementation of traffic lights, use state machines to implement, suitable for beginners
ADDER
- VHDL语言的带控制端口的加法器，实现加法运算。-VHDL language, with a control port of the adder to achieve addition operation.
horse_light
- 具体描述了以下介绍如何使用QUARTUS II4.0的使用，及如何实现灯从1到6的不同亮法。-It descr iption the use of QUARTUS II4.0 and how to make the lights to light in diffent ways.
5DIV
- 用Verilog实现5分频电路,比较实用-Program for 5-DIV circuit in Verilog
ALUnew
- Half Adder which is implemented in gate level
Flash
- pico blaze assembly code for write to micro SD flash with spi protocol
pico_code
- pico blaze VHDL code for write to micro SD flash with spi protocol
VCO_WITH_PLL
- Voltage controlled oscillator with p-Voltage controlled oscillator with pll
study
- 实现了0检测计数算法，速度快，实时性高，而且含有测试波形文件。-Counting detection algorithm achieved a 0 speed, real-time high, and the file containing the test waveform.