资源列表
50602
- vhdl语言实现电子时钟设计 时分秒 可以设置-vhdl language designed to achieve accurate electronic clock can be set
ic6821_latest.tar
- vhdl core of IC6821 code
extension_pack_latest.tar
- This project contains files you can use to expand upon the basic IEEE packages you normally use for creating testbenches and RTL code.
spiflashcontroller_latest.tar
- This VHDL module implements a state controller for a serial (SPI) Flash ROM
FPGA5
- 此为用VHDL语言基于FPGA开发板的分频器源程序-This is the FPGA using VHDL language development board based on the source of the prescaler
VERILOG.HDL
- Verilog 硬件描述语言. 很好的学习HDL语言的书籍资料.-Verilog HDL , a very good book for learning Verilog.
VHDlclock
- 数字秒表的VHDL课程设计 通过硬件测试 精确到ms 最大可计时为24小时 -Digital stopwatch curriculum design through the VHDL hardware testing is accurate to ms maximum time of 24 hours
fre_pha_measure
- 实现了基于cycloneII的信号相位、频率测量，经测试可用-CycloneII based on the realization of the signal phase, frequency measurement, the test can be used
iclock
- 基于cycloneII的电子时钟，可实现手动调整时间，良好的人机界面，简单易用，编程结构清晰-CycloneII-based electronic clock, can be manually adjust the time, a good man-machine interface, easy-to-use, structured programming
wave_generator
- 基于cycloneII的信号发生器，产生正弦波、方波、三角波，人机界面十分友好，可方便地进行波形切换-CycloneII based on the signal generator to produce sine wave, square wave, triangle wave, a very friendly man-machine interface can be easily switched waveform
usb-blaster
- quartus多种USB-bletera 自制下载线！
m_decode
- 关于ISO18000-6c协议中反向链路的编码实现没有最终调通-failed to translate