资源列表
top_vga
- 产生VGA彩条信号(Verilog 语言）-Generate VGA signal
dds1
- 数字合成函数发生器 初学者最好的教程DDS-dds
count2
- 2位并行加法器初学者必看初步了解FPGA-two count
oc8051_verilog
- 兼容8051的内核oc8051，verilog版本的-8051-compatible core oc8051, verilog version of
e002_synopsys
- sysnopsys的cocentric软件及system C使用说明-cocentric the sysnopsys software and use system C
cpu-16-vhdl
- 用vhdl语用实现简单的16位cpu功能-Pragmatic use vhdl simple function of 16-bit cpu
full11adder
- this is a full adder using VHDL it s really helpful
vhdl_cheat_sheet
- this sheet has some impoertant codes to any one that wants to study vhdl may need
VHDL_Tutorial_1
- a veu useful VHDL tutorial if u planning to study it
VHDL_Tutorial_2
- VHDL toturial, vey helpful
VHDL_Tutorial_3
- another VHDL toturial
adder
- 加法器 可做4BIT的運算 用直接語言撰寫-Adder computing can 4BIT