资源列表
final_decode
- rs解码器在fpga上的实现，采用的modelsim开发平台 -rs on fpga decoder in the realization of the development platform used in modelsim
dvi_ctrl_ch7301c
- controller of CH7301C DVI Transmitter Device
KEY_down_detect
- 按键检测VHDL程序，主要实现对开发板按键的检测以及一些时间延迟的信息。程序较全，可以按照不同的开发板设置相应的引脚进行操作。-Key detection VHDL program, the main achievement of some time delay detection and information on the development board keys. Than the whole program, you can set the corresponding pin to
weekly_report_guideline
- Weekly Report Guideline
SingleCycleCPU.zip
- A complete single cycle cpu written in verilog. (Including test modules),A complete single cycle cpu written in verilog. (Including test modules)
ucf-for-ML402
- ucf for mml402 and ise design software.-ucf for mml402.
PS2-keyboard
- 接收PS2键盘编码，有51单片机上调试通过编写于2010年9月-Receive PS2 keyboard encoding, there are 51 single-chip debugging through writing in September 2010
Traffic_Light_Controller
- 该控制器在设计上控制了一个繁忙的高速公路（高速路的红绿灯） 相交一岔路（SRD）等具有相对较轻的交通负荷。图1显示 在交通灯的位置。在十字路口传感器检测汽车的存在 在公路上和岔路。该图意味着，无论是公路和副作用 道路提供每个方向的交通单一车道。这两个普通的道路（红， 黄，绿）信号灯。交集装有一个传感器。-The controller to be designed controls the traffic lights of a busy highway (HWY) inter
TVout
- TV Output for Xilinx FPGAs
tel
- fpga-verilog实现电话计费系统-fpga-verilog telephone billing system to achieve
booth
- 比较好的带符号数乘法的方法是布斯(Booth)算法。它采用相加和相减的操作计算补码数据的乘积。Booth算法对乘数从低位开始判断，根据两个数据位的情况决定进行加法、减法还是仅仅移位操作。-Signed multiplication better approach is to Booth (Booth) algorithms. It uses the operation of addition and subtraction calculations complement data of the
Desenho_LCD_G
- Library for ST7920 graphics display