资源列表
qiangdaqi11
- 用VHDL语言设计一个抢答器系统，能反映抢答者的抢答并作出回应，xilinx平台-design a answer competition system with language VHDL and platform Xilinx
PS2_keyboard_decoder_experiment
- BJ-EPM240V2实验例程以及说明文档实验之九PS2键盘解码实验-BJ-EPM240V2 experimental test routines as well as documentation of nine experiments PS2 keyboard decoder
xiyiji
- 简易洗衣机程序。包括控制、分频、显示模块-Simple and easy washing machine program. Including control, points frequency, display module
cavlc-decode
- 兼容ITU-T H.264（05/2003），但它不计算nC和存储TotalCoeff， 你需要在这个核心之外添加一个nc_decoder-Compatible with ITU-T H.264 (05/2003), but it do not calculate nC and store TotalCoeff, you need to add a nC_decoder outside this core
VHDL
- vhdl的上机手册，对刚开始学hdl的朋友比较实用。-vhdl-on manual, just started to learn more practical friend hdl.
ISE_lab14
- 采用EDA技术，并应用目前广泛应用的VHDL硬件电路描述语言，实现交通灯系统控制 器的设计。掌握使用VHDL语言设计有限状态机的方法。-With EDA technology and application of the widely used hardware descr iption language VHDL, to achieve traffic light system controller design. Master the use of VHDL language desig
freq_syn
- 25-bit frequency synthesizer with 25-bit selection line to generate 96 acurracy signal -25-bit frequency synthesizer with 25-bit selection line to generate 96 acurracy signal
digital-logic-laboratory-report
- 数字逻辑的课程设计。简单模拟了电梯的各种功能。-Digital logic design courses. Simple simulation of the various features of the elevator.
CPU
- 东南大学VHDL课程CPU设计 Verilog语言-Southeast University, CPU design Verilog language VHDL course
vcvhdl
- 两路电机CPLD控制,串口通信，兼遥控PIN信号输入，强制停止。
data_64QAM_map
- OFDM的64QAM星座映射，测试通过，但在时钟方面有待改进-64QAM constellation mapping of OFDM, the test passes and the clock to be improving
GraduationProject
- 进行了一个8位CISC处理器的设计与实现，该微处理器含有计算机基本的功能模块，并对存储器进行了层次化设计。指令系统中的指令分为四大类共十六条，其中包括算术逻辑指令、I/O指令、访存、转移指令和停机指令。在处理器的实现过程中,首先给出了数据通路结构,然后采用VerilogHDL进行硬件电路描述,并对每一个模块进行功能仿真以验证设计的正确性。最后对整个处理器执行程序进行指令验证,并得到综合后的网表。-Conducted an 8-bit CISC processor design and imple