资源列表
VGA
- 应用VEROLOG HDL编写的VGA的IP核，可用于SOPC BUILDER中-the control of the i2c bus
washer
- 根据全自动洗衣机的控制原理设计一个控制电路，使之能够控制洗衣机全自动完成浸泡、洗涤、漂洗、脱水（甩干）等整个工作过程；或者由用户选择，洗衣机单独执行“浸泡”、“洗涤”、“漂洗”、“脱水”中的某个洗衣程序。-Automatic washing machine control principle according to design a control circuit, to enable automatic control of washing machines to complete soak
variable_duty_cycle_pwm
- VHDL project in ISE Xilinx for PWM generation
shejidds
- DDS一个简单的直接数字频率合成，可以用的。NBU的同学们上数字系统设计必备-DDS a easy DDS。
ISE_lab14_traffic
- excd板子上交通灯的实现 数码管实时显示 限于excd学习板-excd-1 traffic led
232Rec
- FPGA中实现串口数据的接收，程序简单明了，采用Verilog语言编写，思路清晰，是初学者的帮手-FPGA implemented in serial data received, the program is simple, using the Verilog language, clear thinking, a beginner s helper
sdram
- ISE14.4环境编程，XILINX spartan3E,SDRAM完整编程-xilinx sdram
SSRAM_design
- SSRAM设计，编译，综合，大家可以参考一下，谢谢大家下载参考-The SSRAM design, compilation, synthesis, we can refer to, thank you download reference
CPLD-AIRCONDITIONER
- 一种基于CPLD的空调控制器的程序，有代码和框图。用VHDL写的 QUARTUS2版本-CPLD-based air controller program, with code and diagram. Written QUARTUS2 version with VHDL
ISE_lab14
- 以前的xilinx公司的软件的FPGA的实验程序4-Xilinx company s previous software FPGA experimental program
SIGNAL_GEN
- 利用EDA的VHDL硬件描述语言设计的函数信号发生器，可以产生递增、递减斜波，三角波，阶梯波，正弦波，方波-The use of EDA, VHDL hardware descr iption language design function of the signal generator can generate increased progressively decreasing ramp, triangle wave, step-wave, sine wave, square wave
FPGA-control-MAX1312
- FPGA控制MAX1312进行数据采集的程序接口程序-FPGA control MAX1312