资源列表
eo
- 用vhdl语言利用fpga来实现电子琴。这个是源程序-With VHDL language use fpga to realize electronic organ. This is the source program
fft_1024_hdl
- 一个 1024 点 FFT ， 基 4 蝶形运算架构， 5级流水，乒乓内存，有测试环境。-A 1024-point FFT, Radix-4 butterfly structure operation, five water, ping-pong memory, a test environment.
ADC0809caiyang
- A/D采样电路。eda实验原理和电路图还有详细的操作说明-The A/D sampling circuit. eda experimental principle and schematic detailed instructions
fir_sine
- This implementation is moderately memory efficient because it stores only the first Pi/2 radians of sine values. The second Pi/2 radians is a mirror image of the first in time and the second Pi radians is a mirror image in amplitude of the first Pi
fifo
- 异步fifo的verilogHDL代码 通过比较读写地址并产生异步空/满标志，再通过把异步空/满标志同步到相应时钟域来实现数据的传递。很好的解决了亚稳态的问题。-code of asynchronous fifo
DWT-VHDL
- 小波变换的VHDL代码，内带正变换逆变换的测试文件。-Wavelet transform VHDL code, with a positive transformation within the inverse transform of the test file.
diantikongzhixiqi2
- 基于FPGA的电梯控制器。其中一共分为3部分，1、显示电路的VHDL程序。2、9层电梯控制器主体的程序。3、顶层模块设计程序-The elevator control system based on FPGA
I2Ccore
- 基于I2C实现的摄像头驱动程序-基于I2C实现的摄像头驱动程序，，，，，，，，
digital-frequence
- 数字频率计 具有4位显示，能自动根据7位十进制计数的结果，自动选择有效数据的 --说 明：高4位进行动态显示。所显示的结果是数码管显示的数据乘以十的N次方；N对应发光二极管的右边点亮的第几位就是几，如果如果最右边的一个被点亮的话，频率就等于显示的 --数值乘以10的一次方。频率的测量范围是0～9,999,999HZ。-Digital frequency meter with four automatically according to the result of seven decim
Verilog_HDL_elevator
- Verilog实现的基于FPGA的五层楼电梯运行控制逻辑设计-FPGA-based five-story elevator control logic implemented in Verilog design
52RD_com.files
- 这是一份很好的初学者入门资料，里面主要讲了vhdl和verilog语法的可综合性，适合初学人群-This is a very good introductory information for beginners, which mainly stresses the vhdl and verilog grammar can be integrated for learning groups
TRAFFIC_LIGHT
- Traffic light control in real time application