资源列表
cf_fft_1024_16
- 16位1024点FFT的VHDL语言实现-16 1024-point FFT VHDL
VHDL_8X8ledaaa
- 一个led8*8的vhdl程序 多余平时有兴趣玩玩led的朋友有小小的帮助-1 led8* 8 of the vhdl procedure superfluous in peacetime are interested in play led to a little help from friends
VHDL_8X8led
- 8X8点阵的VHDL实现，使用10K20，包括顶层原理图-8X8 lattice of VHDL, use 10K20, including top-level schematic diagram
MAC
- 用verilog实现MAC控制器的各个模块详细代码-mac controller
code
- c++语言转verilog语言，程序员不需要学习verilog即可对fpga原型进行快速仿真，本例为catapult c语言的fft程序，可以利用catapult转换工具转成verilog语言， 用modelsim进行仿真，并且可以加各种约束。-c++ program translate verilog program。
src
- AXI Slave codes in verilog. Downloded from www.opencores.org free download
VHDL-ripple-lookahead-carryselect-adder
- vhdl code for ripple carry adder, carry select adder and carry look ahead adder
m
- m序列生成文件，带有我自己写的仿真，结果在modelsim6.0f中生成正确。-m sequence generation file, written with my own simulation results generated in the modelsim6.0f correct.
Lcd(12864)
- 使用芯片c8051f020,在LCD12864上显示汉字信息,编译通过，有此方面需要的童鞋可以下载！-Use chip c8051f020, in Chinese characters displayed on LCD12864 information compiled by, has this need of children' s shoes can be downloaded!
BCD
- BCD\七段显示译码器 数码管段显示发光二级管是共阴连结，所以显示高电平有效，即哪一段的驱动信号为高电平，则对应段发亮-BCD \ seven-segment display decoder digital tube sections show light-emitting diode is a link to a total of yin, it showed high and effective, that is what section of the drive signal is h
Mul_8-VHDL
- 8位直乘的VHDL经典实现，对于初学者很有帮助，占有资源和速度都没有说的-VHDL
mult8x8
- 一个用VerilogHDL语言编写的8X8的乘法器-a Verilog HDL language used in the preparation of the multiplier 8X8