资源列表
cordic_atan
- 实现cordic vector模式 3级流水线 24级迭代-24 iterations of the three pipeline cordic vector mode
Bus_REG_Clk_Crosser
- Clock crosser of register bus
lcd1602
- 利用FPGA 点亮lcd1602,显示字符。利用FPGA 点亮lcd1602,显示字符-lcd1602 display lcd1602 display lcd1602 display
PSK
- 该文档是PSK调制，是8PSK调制方法的VHDL源代码-This document is the PSK modulation, 8PSK modulation method VHDL source code
Basic-system-of-nexys3
- the basic system of nexys3(soft core)
cordic
- 用verilogHDL 语言实现流水线结构的cordic算法，计算信号的幅度和相位-verilogHDL for cordic
ck1
- t6his the last version of the ck!-t6his is the last version of the ck!
k2
- t6his the last version of the ck!-t6his is the last version of the ck!
k3
- t6his the last version of the ck!-t6his is the last version of the ck!
k4
- t6his the last version of the ck!-t6his is the last version of the ck!dd
k5
- t6his the last version of the ck!-t6his is the last version of the ck!
Hamming32
- It has a simple verilog code to calculate 32 bit hamming distance and a test bench to simulate.