- DragAndDropFile Drapanddrop: drag and drop files demo
- 0 《单片机C语言程序设计实训1例——基于851+Proteus仿真》案例压缩包 (这个网上的资料
- vbfrance_GESTION-COMMANDE___Page gestion commande
- achartengine-1.0.0.jar AChartEngine是为android应用而设计的绘图工具库
- 嵌入式微系统msOS 凤舞天(网名)大牛写的书籍
- Go语言实战_ 实战书用来学习go语言里面有丰富的代码可以让你更好的理解go语言(A real book is used to learn the rich code in the go language that allows you to better understand the go language)
资源列表
Verilog_ex4
- 基于FPGA的按下key1键，led0显示SOS信号实验，选用DE1实验板。-Press the key key1 based on FPGA, led0 experiment shows SOS signal
MIPS_shift_32bits
- MIPS架构下的32位桶形移位器的verilog源码-32-bit barrel shifter verilog MIPS architecture of the source
digit_clock
- FPGA设计的时钟！很特别，本人的第一次，还望各位探讨！-FPGA design the clock! Very special, the first time I also hope to explore!
osh
- fpga驱动 常用 程序 用途 基本实验 验证性-fpga driver used the basic experimental procedures for confirmatory purposes
digital-tube
- 基于FPGA平台，实现3*3按键在单位数码管上显示相应字符，再次输入其他数字后，将以前数字在四位数码管实现数字移动-FPGA-based platform, 3* 3 button to display the corresponding character in the digital unit, enter the other numbers again, the figures in the previous four digital tube digital mobile
FPGA_232
- 文件列表
LCD12864VHDL
- 一个LCD12864的驱动程序， 比较基础-Verilog LCD12864
Taxi-Charging-VHDL
- 一个用VHDL写的出租车计价器例子，采用数码管显示，对里程和费用的显示计算。-Taximeter example, to write a VHDL digital display that displays the calculated mileage and expenses.
UART
- Verilog HDL写的实现ＵＡＲＴ收发程序-Realization of Verilog HDL UART receive written procedures
ourdev_481073
- 用FPGA实现VGA驱动程序代码，能够在VGA上显示内容-Using FPGA to achieve VGA driver code, to display content in the VGA
Nios2_H264-AVC_DEC.rar
- 在Altera开发环境下采用Nios II和硬件加速实现H.264解码的系统方案,The solution uses the Nios II development environment and hardware accelerate to implement H.264 decoding under Altera platform
LCD12864VERILOG
- 12864lcd点阵显示，已编译成功，verilog语言编写，亲测可用。-12864lcd dot matrix display, has been compiled successfully, verilog language, pro-test is available.