资源列表
VHDL-(2)
- VHDL软件使用方法 新手快速入门培训PPT-VHDL Quick Start software training novices to use PPT
computer11
- 一种基于FPGA的CPU设计-FPGA-based CPU design ........
xiyiji
- VHDL模拟洗衣机运行过程，用数码管和LED，显示洗涤，漂洗，甩干三个过程分时操作，可手动选择，有倒计时有蜂鸣-VHDL simulation running washing machine, with digital control and LED, display washing, rinsing, drying three processes timeshare, you can manually select, there is a beep countdown
xinlvj-
- 用veilog HDL 语言写的数字心率计的源代码可以用quartus11打开-Write veilog HDL language digital heart rate of open source code can be used quartus11
Floating_Point
- 简单的浮点的内核测试，已经验证通过，VLOGER编写-The core of a simple floating-point test has been adopted to verify, VLOGER prepared
verilog_CPU
- 用verilog写的RISC_CPU，描述文件很详尽，含有测试文件-Written by verilog RISC_CPU, very detailed descr iption of the file containing the test file
s3esk_picoblaze_amplifier_and_adc_control
- Contains bat files for direct upload of adc control to FPGA
FPGA-1602
- 这是自己写的一个 基于ATEARA 公司的FPGA的 1602的程序 传上和交流交流-This is to write a FPGA-based ATEARA s 1602 program transfer and exchange on the exchange
baketball40s
- 篮球40s倒计时控制器，能够预置数，并且实现报警功能，是一个课程设计的题目！-This is a baketball time controller for 40 seconds,which can provide the warning signal and the previous count,and it is a class design title.
CPU
- 利用vhdl模拟实现CPU的功能，实现其中的加减乘除等多种运算-CPU utilization of vhdl simulation of the realization of the function, the realization of which, such as addition and subtraction, multiplication and division multiple computing
iug-u
- 这是VHDL的一些设计程序，对于需要的人来说非常实用，能够很好的解决问题
ref-sdr-sdram-vhdl
- 基于VHDL编写的SDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller