资源列表
CANBUS
- 本文包含了CAN的verilog程序及测代码-This article contains the CAN verilog code and testing procedures
clock_2
- verilog hdl 时钟程序，数码管显示，并可设置闹钟-verilog hdl clock program, the digital display, and can set the alarm
hdlcv
- Programming Verilog design
DE4_530_D5M_DVI
- FPGA摄像头驱动，通过VGA，可以在电脑屏幕上实时显示所采集图像-FPGA camera driver, via VGA, you can capture real-time display of the image on the computer screen
ps2键盘电子琴verilog
- ps2键盘控制的电子琴电路，程序简单实用
CPLD_SPI
- 单片机通过SPI接口与FPGA进行通信的VHDL代码，程序实际可用的-Microcontroller through the SPI interface to communicate with the FPGA, a very common
DDS
- 用DE2开发板做的DDS程序，频率分辨率可以达到1Hz！-DE2 development board to do with the DDS process, the frequency resolution can be achieved 1Hz!
DE2_70_VIDEO_V1.2.0
- daltera友晶的e2-70视频处理源码，包含整个工程，可以下载学习-de2-70videoprocessing source code, including theentireproject, you candownload learning
sine_vhdl
- this a snipet of code about the sine generator implementation in vhdl-this is a snipet of code about the sine generator implementation in vhdl
registerbank
- THIS file consists of register bank and its testbench
ChanEst_ise11
- OFDM基于导频的MMSE信道估计的Verilog完整工程，可以和matlab配合使用，源自清华电子系成熟的工程和算法-Verilog Project for MMSE ChanEst of OFDM
Comparador
- its a comparator of 4bits with ins cascade-its a comparator of 4bits with ins cascade