资源列表
rdf0031
- MicroBlaze Built In Self Test
VHDL
- VHDL的参考手册,具有一定的参考价值,大家可以参考学习下-VHDL reference manual, with some reference value, you can refer to learn under
wervhdl
- 赋值语句有两种,即信号赋值语句和变量赋值语句。每一种赋值语句都有三个基本组成部分,即赋值目标、赋值符号和赋值源。信号赋值语句和变量赋值语句的语法格式如下 :-There are two assignment statements, that is, the signal assignment statements and variable assignments. Each assignment has three basic components of the assignment objec
myfirst_niosii
- Altera DE0-Nano 开发平台NiosII软核处理器RSIC。-Altera DE0-Nano development platform NiosII the soft core processor RSIC.
s3esk_startup
- 利用kcpsm3控制lcd显示 平台:ise 10.1, picoblaze, Spartan3e 开发板 说明:综合按键和lcd、led的功能,思想简单,需要新技术,适合想在fpga方面深造的人。-using kcpsm3 for lcd display platform: ise 10.1, picoblaze, Spartan-3E FPGA Starter Kit Board comment: involve lcd/led/switch, simple mind bu
mimasuo_design
- 这是一个基于quartusII平台,利用VHDL软件编写的关于密码锁的程序,里面把密码锁详细分解为输入模块、密码模块、控制模块以及一个密码锁的总体设计,详细介绍了密码锁的控制过程。-This is based on quartusII platform, software development using VHDL program on lock, which locks in detail the decomposition of the input module, the cryptogr
signaltap_user_guide
- signaltap 中文说明,内容详细。 ALTERA signaltap USER GUIDE IN CHINESE-ALTERA signaltap USER GUIDE IN CHINESE
Crack_QII_13.1_linux_ALL
- quartus 13.1 linux 的破解文件 最新版本的破解文件-quartus 13.1 linux crack file latest version of the crack file
UART.使用FPGA的FIFO,状态机
- 使用FPGA的FIFO,状态机,乒乓操作等实现了异步UART。,The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
neek_ocm_spi
- short c++ builder tutorial
Perfect_CPU
- CPU硬件,才用10条语句的指令。这是清华大学的一个作业题-cpu
