资源列表
COFDMFPGA
- TDD双向无线移动传输系统是在整合最新4G技术、LTE技术优势的基础上，自主研发设计的最新一代高速无线网络数据传输设备，能够在“高速运动中”、“非视距条件下”实现高速实时双向传输。TDD双向无线移动传输系统为满足多个移动远端与主控端之间的双向宽带多媒体和数据通信需求而设计，是运动中综合业务如语音、数据、高质量图像双向传输的最佳选择。传输性能指标达到国际领先，适合无线环境复杂、覆盖范围大、通信质量有保障的特定行业应用。-no
the-verilog-code-of-can-usb-i2c
- CAN总线，I2C，USB等的FPGA实现源码-CAN bus, I2C, USB, etc. FPGA implementation source
KEBIANCHENGLUOJIQIJIANPEIXUN
- 参加电子设计大赛不可或缺的可编程逻辑器件的系统培训资料-System training materials to participate in Electronic Design Contest integral programmable logic devices
pdf00
- fpga filter,非常好的源码文件，大家一起学习，交流-fpga filter, a very good source files, we will study together and exchange
FPGA--TimeQuesREV1.0
- FPGA那些事儿--TimeQuest静态时序分析REV1.0，这个不用多说了吧，经典之作，大家多多学习，共同进步-FPGA that thing- TimeQuest static timing analysis REV1.0, this goes without saying it, classic, everyone can learn together and progress ~ ~
Logic_verilog
- 很多Verilog的例子 很经典 适合FPGA初学者-many Verilog examples
rtc_interface
- 该段代码给移植到黑金DB2C5开发板上面的RTC接口verilog代码，已经经过实验验证。-This code to transplant to black gold DB2C5 development board above RTC interface verilog code, has been experimentally validated.
super_horse
- using LED for super_horse,VHDL
SPI
- 基于verilog语言的 SPI接口实现. 有很好的说明.-Verilog language based SPI interface. Have a good descr iption.
shifter_arm
- 桶形移位器，8位，16位，32位，含ARM桶形移位器。南大计算机系计算机组成原理实验-Barrel shifter, 8, 16, 32, including the ARM barrel shifter. NTU Department of Computer Science Experimental Computer System
real_module
- 对进来的数据进行乒乓操作，例如0-63出来的结果是31-0,63-32.进来和出去为同一时钟，且都是流水线方式，结构为双口RAM.-Ping-pong on the incoming data operations, such as 0-63, the results are 31-0,63-32. Come in and out of the same clock, and are pipelined, the structure of dual-port RAM.
RAM_256x8
- RAM 256x8bits code in VHDL