资源列表
NewFolder
- these are some verilog codes
complex_givens
- 基于cordic算法的givens变换实现矩阵QR分解-Transform matrix QR decomposition based on the givens of cordic algorithm
E5_1_AskMod
- matlab仿真2ask和4ask.可观察信号的时域波形和频谱图。-Matlab simulation 2ask and 4ask. Can observe the signal time domain waveform and spectrum.
attachments_15_02_2011...
- decoder in vhdl coding
lcd1602
- LCD显示源代码，语言verilog逻辑描述语言。功能可根据设置显示需要的信息-The LCD displays the source code, the language verilog logical descr iption language. Functions can be displayed according to the settings needed information
keyboardScan
- PS2接口键盘扫描码截取电路，VHDL程序。该程序能够捕获PS2键盘按下的按键值，并将其扫描码转换成ASCII码。
adder4
- 是用verilog写得加法器以及计数器里面有测试文件（testbench），对于初学者来说这个可以用来参考下-Is written in Verilog adder and counter inside a test file (testbench), for beginners this can be used to reference the next
alucode
- the code is written to perform an ALU operation which is implemented in fpga
VHDL
- 控制电话信令 完成忙碌 等待 回铃音振铃等-Signaling complete control over telephone ring so busy waiting ringback tone
dtrigger
- 常用触发器——D触发器的VERILOG语言描述，可用Quartus II 9.0 和modelsim环境实现。-Common triggers- D flip-flop of VERILOG language descr iption available Quartus II 9.0 and modelsim environment to achieve
fifo
- 采用verilog语言的fifo设计。用notpad编辑-Verilog language fifo design. Edited using notpad
FirFullSerial
- 15阶低通，具有线性相位的全串行FIR滤波器结构的fpga实现-15-order low-pass, with a linear phase FIR filter structure full serial fpga implementation